Re: [BUGFIX]{PATCH] flush icache on ia64 take2

[KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>]

On Thu, 19 Jul 2007 22:01:18 +0900
KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> wrote:

> On Thu, 19 Jul 2007 14:05:06 +0200
> Zoltan Menyhart <Zoltan.Menyhart@bull.net> wrote:
> 
> > KAMEZAWA Hiroyuki wrote:
> > 
> > > Then, what should I do more for fixing this SIGILL problem ?
> > > 
> > > -Kame
> > 
> > I can think of a relatively cheap solution:
> > 
> Maybe I should take performance numbers with the patch.
> 
> But is it too costly that flushing icache page only if a page is newly
> installed into the system (PG_arch1) && it is mapped as executable ?
> 
> I don't want to leak this (stupid) corner case to the file system layer.
> Hmm...can't we do clever flushing (like your idea) in VM layer ?
> 
A bit new idea.  How about this ?
==
- Set PG_arch_1 if  "icache is *not* coherent"
- make flush_dcache_page() to be empty func.
- For Montecito, add kmap_atomic(). This function just set PG_arch1.
  Then, "the page which is copied by the kernel" is marked as "not icache coherent page"
- icache_flush_page() just flushes a page which has PG_arch_1.
- Anonymous page is always has PG_arch_1. Tkae care of Copy-On-Write.
==

looks easy ?

-Kame

 

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