From: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
To: mgross@linux.intel.com
Cc: linux-mm@kvack.org, linux-pm@lists.osdl.org,
torvalds@linux-foundation.org, akpm@linux-foundation.org,
mark.gross@intel.com, neelam.chandwani@intel.com
Subject: Re: [RFC] [PATCH] Power Managed memory base enabling
Date: Tue, 6 Mar 2007 10:26:28 +0900 [thread overview]
Message-ID: <20070306102628.4c32fc65.kamezawa.hiroyu@jp.fujitsu.com> (raw)
In-Reply-To: <20070305181826.GA21515@linux.intel.com>
On Mon, 5 Mar 2007 10:18:26 -0800
Mark Gross <mgross@linux.intel.com> wrote:
> It implements a convention on the 4 bytes of "Proximity Domain ID"
> within the SRAT memory affinity structure as defined in ACPI3.0a. If
> bit 31 is set, then the memory range represented by that PXM is assumed
> to be power managed. We are working on defining a "standard" for
> identifying such memory areas as power manageable and progress committee
> based.
>
This usage of bit 31 surprized me ;)
I think some vendor(sgi?) now using 4byte pxm...
no problem ? and othre OSs will handle this ?
-Kame
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next prev parent reply other threads:[~2007-03-06 1:26 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-03-05 18:18 Mark Gross
2007-03-06 1:26 ` KAMEZAWA Hiroyuki [this message]
2007-03-06 15:54 ` Mark Gross
2007-03-06 15:09 ` David Rientjes
2007-03-06 16:47 ` Mark Gross
2007-03-06 17:12 ` David Rientjes
2007-03-06 17:20 ` Mark Gross
2007-03-06 17:33 ` David Rientjes
2007-03-07 2:40 ` David Rientjes
2007-03-09 20:53 ` Mark Gross
2007-03-09 21:27 ` David Rientjes
2007-03-09 21:26 ` Mark Gross
2007-03-26 12:48 ` [linux-pm] " Pavel Machek
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