From: Andi Kleen <ak@suse.de>
To: John Fusco <fusco_john@yahoo.com>
Cc: linux-mm@kvack.org
Subject: Re: Making PCI Memory Cachable
Date: Sat, 9 Dec 2006 22:36:21 +0100 [thread overview]
Message-ID: <200612092236.21882.ak@suse.de> (raw)
In-Reply-To: <20061209143341.90545.qmail@web52308.mail.yahoo.com>
> BTW, why won't cache coherency protocol work over PCI?
It's not supported by the hardware. There is a initiative from Intel
to support it in the future over PCI-Express, but that's some time
off and still most devices won't support it.
> It has commands to support this, such as "memory read line" and "memory write line". Is it that Linux does not allow memory outside of RAM to be cacheable?
A proper cache coherency protocol is much more complicated. It's a relatively
complex state machine (MESI). Details vary by CPUs.
-Andi
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next prev parent reply other threads:[~2006-12-09 21:36 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-12-09 14:33 John Fusco
2006-12-09 21:36 ` Andi Kleen [this message]
-- strict thread matches above, loose matches on Subject: below --
2006-11-28 14:02 John Fusco
2006-12-06 22:16 ` Andi Kleen
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