From: Andi Kleen <ak@suse.de>
To: Jim Cromie <jim.cromie@gmail.com>
Cc: linux-mm@kvack.org
Subject: Re: X86_CONFIG overrides X86_L1_CACHE_SHIFT default for each CPU model.
Date: Fri, 4 Nov 2005 23:39:57 +0100 [thread overview]
Message-ID: <200511042339.57785.ak@suse.de> (raw)
In-Reply-To: <4367CB17.6050200@gmail.com>
On Tuesday 01 November 2005 21:07, Jim Cromie wrote:
> folks,
>
> in arch/i386/Kconfig, it seems (to me) that X86_GENERIC has undue influence
> on X86_L1_CACHE_SHIFT;
>
> config X86_L1_CACHE_SHIFT
> int
> default "7" if MPENTIUM4 || X86_GENERIC
> default "4" if X86_ELAN || M486 || M386
> default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE ||
> MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 ||
> M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODEGX1
> default "6" if MK7 || MK8 || MPENTIUMM
>
> that is, when X86_GENERIC == true --> default = 7,
> ignoring the platform choice *made* by the user-builder.
> On my geode box, it would be 5 wo GENERIC.
The whole point of GENERIC is to set the cache line size to the worst case
(which is 128 bytes) so that the kernel will run reasonably well on all
systems.
> Ill spare you my half-baked theories about the cause of these results,
> in the hopes that the following patch 'correct-by-inspection', or that
> somebody
> is willing to clarify the purposes of X86_GENERIC.
Your patch is wrong.
> An 'incorrect' guess at cache-line-size doesnt break the kernel;
> is the number used to optimize the cache operation in a way
> thats consistent with the above results ?
It only causes some more padding, which is normally performance neutral.
-Andi
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prev parent reply other threads:[~2005-11-04 22:39 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-11-01 20:07 Jim Cromie
2005-11-04 22:39 ` Andi Kleen [this message]
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