Re: sparsemem & sparsemem extreme question

[Heiko Carstens <heiko.carstens@de.ibm.com>]

> > > to be traversed during a lookup: the page tables.  Granted, the TLB will
> > > provide some caching, but a lookup on ia64 can potentially be much more
> > > expensive than the two cacheline misses that sparsemem extreme might
> > > have.
> > Sure, just that on s390 we have a 1:1 mapping anyway. So these lookups would
> > be more or less for free for us (compared to what we have now).
> Is the 1:1 mapping done with pagetables?  If so, it is not free.

Sure, it's done with pagetables. What I meant: we have the 1:1 mapping already
today. So adding anything to the vmalloc area won't make it more expensive.

> > Actually my concern is that whenever the address space that is covered with
> > SPARSEMEM_EXTREME is not sufficient just another layer of indirection needs
> > to be added.
> Do you have any performance numbers to back up your concerns, or is it
> more about the code complexity?

No, my concern is actually that the s390 archticture actually will come up
with some sort of memory that's present in the physical address space where
the most significant bit of the addresses will be turned _on_. That means we
would need to support the whole 64 bit physical address space...
Considering this, this would be good for at least one if not two additional
indirection layers, which would make the code too complex, IMHO.
That's why I think the vmem_map approach would be easiest to implement this :)

Heiko

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