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From: Matti Aarnio <matti.aarnio@zmailer.org>
To: Daniel Phillips <phillips@arcor.de>
Cc: Dave McCracken <dmccr@us.ibm.com>,
	Linux Memory Management <linux-mm@kvack.org>
Subject: Re: [PATCH] Optimize away pte_chains for single mappings
Date: Mon, 15 Jul 2002 18:40:16 +0300	[thread overview]
Message-ID: <20020715184016.W28720@mea-ext.zmailer.org> (raw)
In-Reply-To: <E17U7Gr-0003bX-00@starship>; from phillips@arcor.de on Mon, Jul 15, 2002 at 04:56:16PM +0200

On Mon, Jul 15, 2002 at 04:56:16PM +0200, Daniel Phillips wrote:
> On Monday 15 July 2002 16:02, Dave McCracken wrote:
> > --On Saturday, July 13, 2002 03:13:35 PM +0200 Daniel Phillips
> > <phillips@arcor.de> wrote:
> > > Why are we using up valuable real estate in page->flags when the low bit
> > > of page->pte_chain is available?
> > 
> > Right now my flag is bit number 18 in page->flags out of 32.  Mechanisms
> > already exist to manipulate this bit in a reasonable fashion.  I don't see
> > any good reason for complicating things by putting a flag bit into a
> > pointer, where we'd have to repeatedly check and clear it before we
> > dereference the pointer.
> 
> Hi Dave,
> 
> It's not more complicated.  You have to check which type of pointer you
> have anyway, and having to strip away the low bit on one of the two
> paths is insignificant in terms of generated code.  The current patch
> has to set and clear the flag bit separately.

  Better not try to play tricks with pointer bits.

  Take  ibm360 - pointers are 24 bit, 8 high-order bits are free for
                 application.  (ibm 370/XA and 390 redefine things.)
                 I don't remember what unaligned access did.
  Take  IBM POWER RISC - pointers are 32 (64) bit, and depending on
                         target object size, 0-3 low-order bits are
                         IGNORED (presumed zero) when accessing memory.
  Take SPARC - Unaligned access (those low-order bits being non-zero)
               causes SIGBUS.
  Take Alpha - Unaligned access (...) does unaligned-access-trap.
  Take i386 - Unaligned accesses are executed happily...

  So.. Some systems can give you 1-3 low-order bits, sometimes needing
  definite masking before usage.    In register-lacking i386 this
  masking is definite punishment..

> > When I discussed this with Rik he said putting it
> > in flags was reasonable.  We can always revisit it in the future if we run
> > out of bits.
> 
> I prefer doing things the most efficient way in core code.
> 
> -- 
> Daniel

/Matti Aarnio
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  reply	other threads:[~2002-07-15 15:40 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2002-07-09 18:35 Dave McCracken
2002-07-13 13:13 ` Daniel Phillips
2002-07-15 14:02   ` Dave McCracken
2002-07-15 14:56     ` Daniel Phillips
2002-07-15 15:40       ` Matti Aarnio [this message]
2002-07-15 16:10         ` Daniel Phillips
2002-07-15 16:34           ` Rik van Riel
2002-07-15 16:42             ` Daniel Phillips
2002-07-15 20:57               ` Andrew Morton
2002-07-16  4:50                 ` Daniel Phillips
2002-07-15 16:30         ` Daniel Phillips
2002-07-15 16:55           ` Matti Aarnio
2002-07-15 17:50             ` Daniel Phillips

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