From: Jamie Lokier <lk@tantalophile.demon.co.uk>
To: Ben LaHaise <bcrl@redhat.com>
Cc: Kanoj Sarcar <kanoj@google.engr.sgi.com>,
linux-mm@kvack.org, mingo@redhat.com, alan@redhat.com
Subject: Re: x86 ptep_get_and_clear question
Date: Thu, 15 Feb 2001 11:55:36 +0100 [thread overview]
Message-ID: <20010215115536.A1257@pcep-jamie.cern.ch> (raw)
In-Reply-To: <Pine.LNX.4.30.0102142101290.15070-100000@today.toronto.redhat.com>; from bcrl@redhat.com on Wed, Feb 14, 2001 at 09:13:11PM -0500
Ben LaHaise wrote:
> x86 hardware goes back to the page tables whenever there is an attempt to
> change the access it has to the pte. Ie, if it originally accessed the
> page table for reading, it will go back to the page tables on write. I
> believe most hardware that performs accessed/dirty bit updates in hardware
> behaves the same way.
I think the scenario in question is this:
Processor 2 has recently done some writes, so the dirty bit is set in
processor 2's TLB.
Processor 1 clears the dirty bit atomically.
Processor 2 does some more writes, and does not check the page table
because the page is already dirty in its TLB.
Result: The later writes on processor 2 do not mark the page dirty.
-- Jamie
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next prev parent reply other threads:[~2001-02-15 10:55 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-02-15 1:50 Kanoj Sarcar
2001-02-15 2:13 ` Ben LaHaise
2001-02-15 2:37 ` Kanoj Sarcar
2001-02-15 10:55 ` Jamie Lokier [this message]
2001-02-15 16:06 ` Ben LaHaise
2001-02-15 16:35 ` Jamie Lokier
2001-02-15 17:23 ` Kanoj Sarcar
2001-02-15 17:27 ` Ben LaHaise
2001-02-15 17:38 ` Kanoj Sarcar
2001-02-15 17:46 ` Ben LaHaise
2001-02-15 17:47 ` Jamie Lokier
2001-02-15 18:05 ` Kanoj Sarcar
2001-02-15 18:23 ` Kanoj Sarcar
2001-02-15 18:42 ` Jamie Lokier
2001-02-15 18:57 ` Kanoj Sarcar
2001-02-15 19:06 ` Ben LaHaise
2001-02-15 19:19 ` Kanoj Sarcar
2001-02-15 18:51 ` Manfred Spraul
2001-02-15 19:05 ` Kanoj Sarcar
2001-02-15 19:19 ` Jamie Lokier
2001-02-15 19:07 ` Jamie Lokier
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