From: "Stephen C. Tweedie" <sct@redhat.com>
To: Timur Tabi <ttabi@interactivesi.com>
Cc: Linux MM mailing list <linux-mm@kvack.org>
Subject: Re: pgd/pmd/pte and x86 kernel virtual addresses
Date: Tue, 29 Aug 2000 00:09:35 +0100 [thread overview]
Message-ID: <20000829000935.K1467@redhat.com> (raw)
In-Reply-To: <20000825185716Z131186-247+10@kanga.kvack.org>; from ttabi@interactivesi.com on Fri, Aug 25, 2000 at 01:46:33PM -0500
Hi,
On Fri, Aug 25, 2000 at 01:46:33PM -0500, Timur Tabi wrote:
> physical pointer. The first is the normal virtual pointer for kernel memory,
> and the second is the one returned by ioremap_nocache(). I was under the
> understanding that caching is enabled on physical pages only, so it shouldn't
> matter which virtual address I use. Is that correct?
No. The no-cache bit is set in the page table entry, so depends on
the virtual address. There is a *different* form of memory access
control which can be used to make memory non-cachable, and that is the
"mtrr" (Memory Type Range Register), which exists in different forms
on all recent Intel and AMD cpus. Mtrrs work on physical addresses,
but that is not what ioremap_nocache() uses.
--Stephen
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next prev parent reply other threads:[~2000-08-28 23:09 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2000-08-24 23:21 Timur Tabi
2000-08-24 23:43 ` Benjamin C.R. LaHaise
2000-08-25 15:25 ` Timur Tabi
2000-08-25 16:45 ` Benjamin C.R. LaHaise
2000-08-25 16:40 ` Timur Tabi
2000-08-25 16:59 ` Benjamin C.R. LaHaise
2000-08-25 18:46 ` Timur Tabi
2000-08-26 3:59 ` Benjamin C.R. LaHaise
2000-08-28 23:09 ` Stephen C. Tweedie [this message]
2000-08-29 15:31 ` Timur Tabi
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