From: "Stephen C. Tweedie" <sct@redhat.com>
To: "David S. Miller" <davem@redhat.com>
Cc: sct@redhat.com, alan@lxorguk.ukuu.org.uk,
kanoj@google.engr.sgi.com, manfreds@colorfullife.com,
linux-kernel@vger.rutgers.edu, linux-mm@kvack.org,
torvalds@transmeta.com
Subject: Re: zap_page_range(): TLB flush race
Date: Tue, 11 Apr 2000 10:14:18 +0100 [thread overview]
Message-ID: <20000411101418.E2740@redhat.com> (raw)
In-Reply-To: <200004102312.QAA05115@pizda.ninka.net>; from davem@redhat.com on Mon, Apr 10, 2000 at 04:12:18PM -0700
Hi,
On Mon, Apr 10, 2000 at 04:12:18PM -0700, David S. Miller wrote:
> On Sun, Apr 09, 2000 at 12:37:05AM +0100, Alan Cox wrote:
> >
> > Basically establish_pte() has to be architecture specific, as some processors
> > need different orders either to avoid races or to handle cpu specific
> > limitations.
>
> What exactly do different architectures need which set_pte() doesn't
> already allow them to do magic in?
>
> Doing a properly synchronized PTE update and Cache/TLB flush when the
> mapping can exist on multiple processors is not most efficiently done
> if we take some generic setup.
OK, I'm sure there are optimisation issues, but I was worried about
correctness problems from what Alan said.
--Stephen
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next prev parent reply other threads:[~2000-04-11 9:14 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2000-04-08 20:06 Manfred Spraul
2000-04-08 21:11 ` Kanoj Sarcar
2000-04-08 22:46 ` Manfred Spraul
2000-04-08 23:31 ` Kanoj Sarcar
2000-04-08 23:37 ` Alan Cox
2000-04-08 23:54 ` Kanoj Sarcar
2000-04-09 9:10 ` Manfred Spraul
2000-04-09 9:19 ` David S. Miller
2000-04-10 22:21 ` Stephen C. Tweedie
2000-04-10 23:12 ` David S. Miller
2000-04-11 9:14 ` Stephen C. Tweedie [this message]
2000-04-11 14:41 ` Manfred Spraul
2000-04-11 16:40 ` Andrea Arcangeli
2000-04-11 17:45 ` Manfred Spraul
2000-04-11 18:14 ` Kanoj Sarcar
2000-04-12 10:02 ` Jamie Lokier
2000-04-11 11:56 ` Alan Cox
2000-04-08 23:44 ` David S. Miller
2000-04-09 0:20 ` Kanoj Sarcar
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