From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19FD1C48297 for ; Mon, 12 Feb 2024 13:06:01 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 88DEB6B007B; Mon, 12 Feb 2024 08:06:00 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 83DCF6B007E; Mon, 12 Feb 2024 08:06:00 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 72C856B0080; Mon, 12 Feb 2024 08:06:00 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0012.hostedemail.com [216.40.44.12]) by kanga.kvack.org (Postfix) with ESMTP id 616376B007B for ; Mon, 12 Feb 2024 08:06:00 -0500 (EST) Received: from smtpin11.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay02.hostedemail.com (Postfix) with ESMTP id 2DF4312093E for ; Mon, 12 Feb 2024 13:06:00 +0000 (UTC) X-FDA: 81783174480.11.C1C42BC Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by imf06.hostedemail.com (Postfix) with ESMTP id 5E694180012 for ; Mon, 12 Feb 2024 13:05:58 +0000 (UTC) Authentication-Results: imf06.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf06.hostedemail.com: domain of ryan.roberts@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=ryan.roberts@arm.com ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1707743158; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=N11KFqMoDAR90InDNWBPxTm0hLDK2b6Gkr+xHuSQ4ZA=; b=Q+OobYLshfXpPW+nMDMwHxLZeED9ldAgxwxebo/DvwOm+1UDdtl6rGju5LAnns5gcM99nJ 1m/QUNUxPCGCy98XVPMU0OPf3RWf5akFwLznGJa6s0URf9TCZyz0cp2PEgyPRA0feIJRTc PWytsXtDuWyHmV6Yw3WGSfPRsklnjok= ARC-Authentication-Results: i=1; imf06.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf06.hostedemail.com: domain of ryan.roberts@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=ryan.roberts@arm.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1707743158; a=rsa-sha256; cv=none; b=leU9kaFoWHwvZw/xRevfhvwa9I0ZOXuiT+gRpqGPgHNy4VkFlQTAsjq8LEvzt/V8lIQkoT dlGjh7/YXTwGdPJABFCrOnE5LNvTtpF4XeAgnTlwt8O1OQtJlwnR0ueQe8oBFbUL6Vgh9Y SnexbfrduhtJY42XB58C06wyW2NS2/E= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B36FFDA7; Mon, 12 Feb 2024 05:06:38 -0800 (PST) Received: from [10.57.78.115] (unknown [10.57.78.115]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7B2263F7BD; Mon, 12 Feb 2024 05:05:53 -0800 (PST) Message-ID: <1ef4c737-0926-424c-9698-794c23370b74@arm.com> Date: Mon, 12 Feb 2024 13:05:51 +0000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 18/25] arm64/mm: Split __flush_tlb_range() to elide trailing DSB Content-Language: en-GB To: David Hildenbrand , Catalin Marinas , Will Deacon , Ard Biesheuvel , Marc Zyngier , James Morse , Andrey Ryabinin , Andrew Morton , Matthew Wilcox , Mark Rutland , Kefeng Wang , John Hubbard , Zi Yan , Barry Song <21cnbao@gmail.com>, Alistair Popple , Yang Shi , Nicholas Piggin , Christophe Leroy , "Aneesh Kumar K.V" , "Naveen N. Rao" , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Cc: linux-arm-kernel@lists.infradead.org, x86@kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mm@kvack.org, linux-kernel@vger.kernel.org References: <20240202080756.1453939-1-ryan.roberts@arm.com> <20240202080756.1453939-19-ryan.roberts@arm.com> <9e1d793a-02c9-4dbb-a6d4-1e1c0c42638c@redhat.com> From: Ryan Roberts In-Reply-To: <9e1d793a-02c9-4dbb-a6d4-1e1c0c42638c@redhat.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 5E694180012 X-Rspam-User: X-Rspamd-Server: rspam02 X-Stat-Signature: i9k5rnj7ay9s9ci38aoi6k9e7ysbite6 X-HE-Tag: 1707743158-621888 X-HE-Meta: U2FsdGVkX19YAQcQMHEr0KIYFvFUvaEUsoqf4SAd/iGUCDXR1xxDnnC+kR2DFF27F5w86wBqSqH+wzrOBmJsI00jF3AlUtOEEAqsg9QNFA8GzEpO+6taj6woziQb6K2fdtiRWEh/11K0qk9dhqKJjNiT1dMB7XjhcmOShHswqdAurKYtG0ICwqPDVQulCaXx5BrTRTFp/1TZOhFWtnWU5/h0z1UIDqh3YTpIuHKRseJ3r5MAg9RIL2H1ndk1DrObJnsAyy4/e5e6/erxksDu1QeZaATGRQwwLC1/TYt3pvTPmASomQZXcXQndfrmiw3slrjw5EItRcHnklJXpc47fT92BjFO/5tS+7jawOlbZRySa0YH8e5B59xj4wxRvbeXKhVirqbmToYtd/8lr4vDaIJWdzl+HdxpNaN4j4fnAhh/WDfn+yrnQ1XDIGh50IMOwdcXYliEhED6HoUpR1mZGqdmxo7N8g/aPYX9yNAYEe8eCKfEE/gBEyXXNorlVYDFKzO76q6bPtPLBN6sl/DQ7owWnMdKbOlqnuSOB7NVysJ7W4wNd9SUdgRlbJ496dI4SylDg3YnNgwIbTkLWqJGq+6Z4NG2tv0LNxXavgNxQvBjXvskiUJFLbjB9PYdrh618t0AedoDoO/x8O5hrCAapGV6urwDnMYe+WrnEWMxQKwIM7gC86hbz7bMPwYdEgM3+ncNaFbGhKh1kipK/rHlKElRYG5TYPrSbJJ7kMiu8I94DHVtkBk7L7+/rwuYpbhDUcdMehypBExc/iOtq+HyYEJRm5HMYsgeC9mSnUqAIhnUVZsVWoGHgzKQfrRN6rTz3KQAg193SYD2K2wm7vUPF2Po+0I2dv0O9XzIf/KwJel/fkWB72sSwdvqMe48C9IUfuqPlqiLD+uaEX5IET7wqvcB8fueQEpBC4eQyveGQxLn0yNmlIP3FTP4xdc2gTZYViIICgiaFDpQFKInK7a /Hw== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On 12/02/2024 12:44, David Hildenbrand wrote: > On 02.02.24 09:07, Ryan Roberts wrote: >> Split __flush_tlb_range() into __flush_tlb_range_nosync() + >> __flush_tlb_range(), in the same way as the existing flush_tlb_page() >> arrangement. This allows calling __flush_tlb_range_nosync() to elide the >> trailing DSB. Forthcoming "contpte" code will take advantage of this >> when clearing the young bit from a contiguous range of ptes. >> >> Tested-by: John Hubbard >> Signed-off-by: Ryan Roberts >> --- >>   arch/arm64/include/asm/tlbflush.h | 13 +++++++++++-- >>   1 file changed, 11 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/include/asm/tlbflush.h >> b/arch/arm64/include/asm/tlbflush.h >> index 79e932a1bdf8..50a765917327 100644 >> --- a/arch/arm64/include/asm/tlbflush.h >> +++ b/arch/arm64/include/asm/tlbflush.h >> @@ -422,7 +422,7 @@ do {                                    \ >>   #define __flush_s2_tlb_range_op(op, start, pages, stride, tlb_level) \ >>       __flush_tlb_range_op(op, start, pages, stride, 0, tlb_level, false, >> kvm_lpa2_is_enabled()); >>   -static inline void __flush_tlb_range(struct vm_area_struct *vma, >> +static inline void __flush_tlb_range_nosync(struct vm_area_struct *vma, >>                        unsigned long start, unsigned long end, >>                        unsigned long stride, bool last_level, >>                        int tlb_level) >> @@ -456,10 +456,19 @@ static inline void __flush_tlb_range(struct >> vm_area_struct *vma, >>           __flush_tlb_range_op(vae1is, start, pages, stride, asid, >>                        tlb_level, true, lpa2_is_enabled()); >>   -    dsb(ish); >>       mmu_notifier_arch_invalidate_secondary_tlbs(vma->vm_mm, start, end); >>   } >>   +static inline void __flush_tlb_range(struct vm_area_struct *vma, >> +                     unsigned long start, unsigned long end, >> +                     unsigned long stride, bool last_level, >> +                     int tlb_level) >> +{ >> +    __flush_tlb_range_nosync(vma, start, end, stride, >> +                 last_level, tlb_level); >> +    dsb(ish); >> +} >> + >>   static inline void flush_tlb_range(struct vm_area_struct *vma, >>                      unsigned long start, unsigned long end) >>   { > > You're now calling dsb() after mmu_notifier_arch_invalidate_secondary_tlbs(). > > > In flush_tlb_mm(), we have the order > >     dsb(ish);    >     mmu_notifier_arch_invalidate_secondary_tlbs() > > In flush_tlb_page(), we have the effective order: > >     mmu_notifier_arch_invalidate_secondary_tlbs() >     dsb(ish); > > In flush_tlb_range(), we used to have the order: > >     dsb(ish); >     mmu_notifier_arch_invalidate_secondary_tlbs(); > > > So I *suspect* having that DSB before > mmu_notifier_arch_invalidate_secondary_tlbs() is fine. Hopefully, nothing in > there relies on that placement. Will spotted this against v3. My argument was that I was following the existing pattern in flush_tlb_page(). Apparently that is not correct and needs changing, but the conclusion was to leave my change as is for now, since it is consistent and change them at a later date together. https://lore.kernel.org/linux-arm-kernel/123a58b0-2ea6-4da3-9719-98ca55c8095e@arm.com/ > > Maybe wort spelling out in the patch description > > Reviewed-by: David Hildenbrand > Thanks!