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h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=q4o7vSn0CL3AE34IYW0A28ObmyC0/AovqMKiX8ETjREHWSV3hA/69vGjO4TEGCuXl uxgKPmx5HpNKOENAA6d1klBtQOq5eCKj7Z/LFS6EYS4RU/mRRFjEfNhxoUYDreWYJ7 NnDQYFf/oHSxnHRrbb6eQa5wWiF9uyl5KKVRtj3c= Message-ID: <1d3df806-fdf5-4cd8-960a-9ebb707de575@arm.com> Date: Thu, 9 Apr 2026 07:38:23 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC V1 00/16] arm64/mm: Enable 128 bit page table entries To: "David Hildenbrand (Arm)" , linux-arm-kernel@lists.infradead.org Cc: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Lorenzo Stoakes , Andrew Morton , Mike Rapoport , Linu Cherian , linux-kernel@vger.kernel.org, linux-mm@kvack.org References: <20260224051153.3150613-1-anshuman.khandual@arm.com> <8d2c9ecb-ae33-42f2-a8ed-66b3286b9286@arm.com> Content-Language: en-US From: Anshuman Khandual In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Rspamd-Server: rspam01 X-Rspamd-Queue-Id: 755CFC0007 X-Stat-Signature: 1wncjj9ug5u3cm4us4htw8r994xdyz5j X-Rspam-User: X-HE-Tag: 1775700511-680812 X-HE-Meta: U2FsdGVkX1+ZObujydssvIS3MICj7s68ogqYDUBrRMNxLEHku0sQvXoS60bXyOojGwyIsO3sFLT3oVyirxtUInWIfva364nZiIn3fvbENtKQG4/B3BMdLxFtLHARYd1vTJq0nBhR3mJLIxgsr8oVJugVmSRthlFRmlhOgHa31xd/IE68AGt9w7ls5mZgGAIniMGFlFt6z2qvh13/1O+INuA3lu6To4+e7QQ92L/yypSdd48dWH1HCcQNBsQVz64Oc2n1mYeh24Vqq/InTMQysmdjhYEw+x9xOjRnKJVzYKc3uUuqPVpFs+3h/086LfRPpuOZyrqUeivbkq5QQ08w5YPGl8F45Swu8usP4+QlKh4t0jhaGmgoHYgZOBeNors/n5r/inIFUuPF0pOqQ0ILx5Zsm1xGDsq1xl9l472Z7g/X8mHd/4o/YOzVIlFmCO+mB3oxwkH1f7iCcQFKQxFqbs6DuuarD1KdXzdEdxhobSwC3GcHvBhffOxUIC0FbNtsQQUqjq66N4EkupxsMxdi/Lo+Zj0LdK60U8eKQlLUOQ9qKzeIyNomIkM6RMUp0z+LgzSkxjB/4QRbGZ3TDt6A+nOTt0oiUcQOTj2F/rZO9EdOxUlEz6w/LeYNJnLXHGuExR1hOfbFSHR8rfJVUZhbL0mF7SC2hxamu3R4pIr1diaQkyIU24J/XbFQbjhiGbhNDdwy3TxwenCObLRoB88vzEQVxmRca7W6rbjOgXSaK9oRJLcM65jaPNxv9a4740SgKUzBBe4zNhMvQNNEBbZlbcAlReGcFLb+Bu2UjtaD0XXWXQsILcHCQ5TwEZpxXZVqVdl7Pez8TAJAUlB/kHE1ysXsKWpNRFRDx5PGn9zxU8voyvwh3+ZHld6XBSRo9hAWk7ZdZIE0nQfRu+Dy7NtUqfvQusiJ/NfvoqyXYZs5FjTu5NpD0tSo9pAWiNnSZV1KpExwchkKHY9oRobLQH4 CShw1lMu 1ErrUlO9X8minSpIkyGPUScoZZHhP8Qa2tZj3mHEj4kVIwrsJmksZa4nOehWM5xWr4FMyRxxPxUGNrwuiSZxAiAmcXjfCW/dYpKCfYj4+J0Bj4l1SA3nY0T+X9clpsqC3eB66LUpBMnmrMqvBIM0aEEprE2ND3H0Jtj9A2HkZfrkZilL5wNdK+/eaYR8hbkMNBh0YVSwZucs7Rw3vxh2xbX8A6JTTixXrAeqYXkF026U/3Fw= Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On 08/04/26 5:43 PM, David Hildenbrand (Arm) wrote: > On 4/8/26 12:53, Anshuman Khandual wrote: >> On 07/04/26 8:14 PM, David Hildenbrand (Arm) wrote: >>> On 2/24/26 06:11, Anshuman Khandual wrote: >>>> FEAT_D128 is a new arm architecture feature adding support for VMSAv9-128 >>>> translation system. FEAT_D128 is an optional feature from ARMV9.3 onwards. >>>> So with this feature arm64 platforms could have two different translation >>>> systems, VMSAv8-64 and VMSAv9-128 could selectively be enabled. >>>> >>>> FEAT_D128 adds 128 bit page table entries, thus supporting larger physical >>>> and virtual address range while also expanding available room for more MMU >>>> management feature bits both for HW and SW. >>>> >>>> This series has been split into two parts. Generic MM changes followed by >>>> arm64 platform changes, finally enabling D128 with a new config ARM64_D128. >>>> >>>> READ_ONCE() on page table entries get routed via level specific pxdp_get() >>>> helpers which platforms could then override when required. These accessors >>>> on arm64 platform help in ensuring page table accesses are performed in an >>>> atomic manner while reading 128 bit page table entries. >>>> >>>> All ARM64_VA_BITS and ARM64_PA_BITS combinations for all page sizes are now >>>> supported both on D64 and D128 translation regimes. Although new 56 bits VA >>>> space is not yet supported. Similarly FEAT_D128 skip level is not supported >>>> currently. >>>> >>>> Basic page table geometry has been changed with D128 as there are now fewer >>>> entries per level. Please refer to the following table for leaf entry sizes >>>> >>>> D64 D128 >>>> ------------------------------------------------ >>>> | PAGE_SIZE | PMD | PUD | PMD | PUD | >>>> -----------------------------|-----------------| >>>> | 4K | 2M | 1G | 1M | 256M | >>>> | 16K | 32M | 64G | 16M | 16G | >>>> | 64K | 512M | 4T | 256M | 1T | >>>> ------------------------------------------------ >>>> >>> >>> Interesting. That means user space will have it even harder to optimize >>> for THP sizes. >>> >>> What's the effect on cont-pte? Do they still span the same number of >>> entries and there is effectively no change? >> >> The numbers are the same for 4K base page size but will need >> some changes for 16K and 64K base page sizes. Something that >> git missed in this series, will fix it. > > Oh, and it would be great to also clearly spell out the effect on > hugetlb as well. I assume the available hugetlb sizes will change as well. Sure will update the required information in the commit message as well as in file arch/arm64/mm/hugetlb.c, where HugeTLB sizes support matrix is enlisted.