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From: "Rob Herring (Arm)" <robh@kernel.org>
To: Samuel Holland <samuel.holland@sifive.com>
Cc: devicetree@vger.kernel.org, Palmer Dabbelt <palmer@dabbelt.com>,
	 Rob Herring <robh+dt@kernel.org>, Paul Walmsley <pjw@kernel.org>,
	 Alexandre Ghiti <alex@ghiti.fr>,
	Emil Renner Berthing <kernel@esmil.dk>,
	 linux-kernel@vger.kernel.org, linux-mm@kvack.org,
	 linux-riscv@lists.infradead.org,
	Andrew Morton <akpm@linux-foundation.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor@kernel.org>
Subject: Re: [PATCH v2 15/18] dt-bindings: riscv: Describe physical memory regions
Date: Thu, 09 Oct 2025 07:37:36 -0500	[thread overview]
Message-ID: <176001310599.1845440.13113067302880070823.robh@kernel.org> (raw)
In-Reply-To: <20251009015839.3460231-16-samuel.holland@sifive.com>


On Wed, 08 Oct 2025 18:57:51 -0700, Samuel Holland wrote:
> Information about physical memory regions is needed by both the kernel
> and M-mode firmware. For example, the kernel needs to know about
> noncacheable aliases of cacheable memory in order to allocate coherent
> memory pages for DMA. M-mode firmware needs to know about those aliases
> so it can protect itself from lower-privileged software.
> 
> The RISC-V Privileged Architecture delegates the description of Physical
> Memory Attributes (PMAs) to the platform. On DT-based platforms, it
> makes sense to put this information in the devicetree.
> 
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
> ---
> 
> Changes in v2:
>  - Remove references to Physical Address Width (no longer part of Smmpt)
>  - Remove special first entry from the list of physical memory regions
>  - Fix compatible string in example
> 
>  .../bindings/riscv/physical-memory.yaml       | 91 +++++++++++++++++++
>  include/dt-bindings/riscv/physical-memory.h   | 44 +++++++++
>  2 files changed, 135 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/riscv/physical-memory.yaml
>  create mode 100644 include/dt-bindings/riscv/physical-memory.h
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/riscv/physical-memory.example.dtb: / (beagle,beaglev-starlight-jh7100-r0): 'model' is a required property
	from schema $id: http://devicetree.org/schemas/root-node.yaml#

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20251009015839.3460231-16-samuel.holland@sifive.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.



  reply	other threads:[~2025-10-09 12:37 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-09  1:57 [PATCH v2 00/18] riscv: Memory type control for platforms with physical memory aliases Samuel Holland
2025-10-09  1:57 ` [PATCH v2 01/18] mm/ptdump: Replace READ_ONCE() with standard page table accessors Samuel Holland
2025-10-09  9:34   ` David Hildenbrand
2025-10-09  1:57 ` [PATCH v2 02/18] perf/core: " Samuel Holland
2025-10-09  2:03   ` Anshuman Khandual
2025-10-09  1:57 ` [PATCH v2 03/18] mm: Move the fallback definitions of pXXp_get() Samuel Holland
2025-10-09  1:57 ` [PATCH v2 04/18] mm: Always use page table accessor functions Samuel Holland
2025-10-09  2:10   ` Anshuman Khandual
2025-10-09  1:57 ` [PATCH v2 05/18] mm: Allow page table accessors to be non-idempotent Samuel Holland
2025-10-09  1:57 ` [PATCH v2 06/18] riscv: hibernate: Replace open-coded pXXp_get() Samuel Holland
2025-10-09  1:57 ` [PATCH v2 07/18] riscv: mm: Always use page table accessor functions Samuel Holland
2025-10-09  1:57 ` [PATCH v2 08/18] riscv: mm: Simplify set_p4d() and set_pgd() Samuel Holland
2025-10-09  1:57 ` [PATCH v2 09/18] riscv: mm: Deduplicate _PAGE_CHG_MASK definition Samuel Holland
2025-10-09  1:57 ` [PATCH v2 10/18] riscv: ptdump: Only show N and MT bits when enabled in the kernel Samuel Holland
2025-10-09  1:57 ` [PATCH v2 11/18] riscv: mm: Fix up memory types when writing page tables Samuel Holland
2025-10-09  1:57 ` [PATCH v2 12/18] riscv: mm: Expose all page table bits to assembly code Samuel Holland
2025-10-09  1:57 ` [PATCH v2 13/18] riscv: alternative: Add an ALTERNATIVE_3 macro Samuel Holland
2025-10-09  1:57 ` [PATCH v2 14/18] riscv: alternative: Allow calls with alternate link registers Samuel Holland
2025-10-09  1:57 ` [PATCH v2 15/18] dt-bindings: riscv: Describe physical memory regions Samuel Holland
2025-10-09 12:37   ` Rob Herring (Arm) [this message]
2025-10-09  1:57 ` [PATCH v2 16/18] riscv: mm: Use physical memory aliases to apply PMAs Samuel Holland
2025-10-10 15:06   ` Emil Renner Berthing
2025-10-10 16:12     ` Samuel Holland
2025-10-10 17:04       ` Emil Renner Berthing
2025-10-10 18:01         ` Samuel Holland
2025-10-10 19:55           ` Emil Renner Berthing
2025-10-09  1:57 ` [PATCH v2 17/18] riscv: dts: starfive: jh7100: Use physical memory ranges for DMA Samuel Holland
2025-10-10 14:19   ` Emil Renner Berthing
2025-10-10 16:51     ` Samuel Holland
2025-10-14  9:14   ` Conor Dooley
2025-10-09  1:57 ` [PATCH v2 18/18] riscv: dts: eswin: eic7700: " Samuel Holland
2025-10-10  1:15 ` [PATCH v2 00/18] riscv: Memory type control for platforms with physical memory aliases Andrew Morton
2025-10-10 17:17   ` Samuel Holland

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