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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1751932668; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ID9d9BcvZSRiBAL43tNvk/za2oURSldztZwoYSZZSRw=; b=iCB7Z7v+qgC1UWXo11wDeTQYTDq197Mo2PfW2D13YQg3yqRj6c3A6ST4556ikTQqdozS3O j4raBn9VW285hppCFSam1N59OXM37/ATWcv3SJciEGO9YoW9HTTNmSOSp8xIhlV5mFouXV 6VErk7tOb4bvc4aPcMwXIMUx/2NXg+k= From: Oliver Upton To: maz@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, ryan.roberts@arm.com, shahuang@redhat.com, lpieralisi@kernel.org, david@redhat.com, ddutile@redhat.com, seanjc@google.com, Jason Gunthorpe , ankita@nvidia.com Cc: Oliver Upton , aniketa@nvidia.com, cjia@nvidia.com, kwankhede@nvidia.com, kjaju@nvidia.com, targupta@nvidia.com, vsethi@nvidia.com, acurrid@nvidia.com, apopple@nvidia.com, jhubbard@nvidia.com, danw@nvidia.com, zhiw@nvidia.com, mochs@nvidia.com, udhoke@nvidia.com, dnigam@nvidia.com, alex.williamson@redhat.com, sebastianene@google.com, coltonlewis@google.com, kevin.tian@intel.com, yi.l.liu@intel.com, ardb@kernel.org, akpm@linux-foundation.org, gshan@redhat.com, linux-mm@kvack.org, tabba@google.com, qperret@google.com, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, maobibo@loongson.cn Subject: Re: [PATCH v10 0/6] KVM: arm64: Map GPU device memory as cacheable Date: Mon, 7 Jul 2025 16:57:30 -0700 Message-Id: <175193253138.1687959.6241606194423745301.b4-ty@linux.dev> In-Reply-To: <20250705071717.5062-1-ankita@nvidia.com> References: <20250705071717.5062-1-ankita@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT X-Rspam-User: X-Rspamd-Server: rspam08 X-Rspamd-Queue-Id: C237740013 X-Stat-Signature: f8g5y1uikyefpjctb94jr3hdf9reeyqy X-HE-Tag: 1751932670-216532 X-HE-Meta: U2FsdGVkX1/e+tKjuO5/SJaaqTslfmecsZV9yecHgojWfmLL5ITxFRo9tqNFC9jHX2XTnmPkJXvZBuHWRbpHEW1I+nkUzOZ+zAEiBEqRLHns7vCK3yYOAXpvnls4l752Zx6fE+jQfsL4xY4a6/hvy/98FDLXZlNz2sHvhmUcn4MrfPa2NPeqiTnwV+x5kCjrvXNouSgOifim5weqrIt+Sf3lYRcVDgFSy+v/IyMXS3h/iZybXHPNPy2M9+D8WqB/KTkcU/vRu/9qub+9XkCEhETK82kmtryjcu0FxkNE/3R0GB4iZfj2EI6e0F5GjrfDOK/NDOBoVb7tjo5thXFDrKgqpNqBBcBr2HfPAf1uCSKA2Yy2L/GAFinXOtnmXv855/HSPaPt2zO3rpXiRYHUAPEDCXs8jqvcqKSPvsLZQgCenxeNlrkompkiO7I2rCbHn3XTkvpp4b6biYfOYIiLuHnOTslbTgSrMRmA+hdFfVqEGyzssSCp5ATtRPEvEOi1cR2ts6U9/YQzcepalUzV/wtJ/U3+HJg7wPzEkZPtXtfIh18hG90Cq3RkOQmOHC7oPtL/LL4Ll28npygI/T0ZMCATmA8qzqyOEU1ELNuqoq/00z3M6wnUkSixnZB7MCZAkkIncbxFWYFRtmVhYSIqpQ87jsNMBfnmZaFZqhAFPsVvii7DF+Y0E8x9wusZQJhbes/PR2q2leg+cHpINMzvdKXdQBJd6d4TfTXTfTed8b/b0a1wyBolp/IgBstZ3h9Llj+FYHmNVZoc1X9jFED/Rqvf3sxS9+E6YfhhnyTBSR8kRWF9/6Ta5wkir1zkBAz8BJNzcXNbixfejAe5yXEua1Pk4aRPU516F64FsCz3B8u1CDPBHTdcm1lqcEuBhfLkxcc+0sh9xZu+TOII5V5OnmyvHCZrO4KzoaDLZ9PkfW3en9GVY6bx453z16FQ8lupTSbKlAftiwjF86QNFAH EHMe3zM7 9ePKED3tcgheW0Pmuv0H/snqXcPNY1zablCWwBni3/nbCuZhtEEz2kd70cHSdsPyzQN6aQKWjUJinFWGr4FkDmx+dmIGk/Qs7cEU3s67bSb2OgI4HfUC3PVTwvtRZXuqmCi3/NZkw3k+PnL6WTQHd/zQIUNxnpmooW7QVuQ9LJTuCtFLeNp1lRUYnuo6/a0xcTDQSd9P9NvKUkW6b88wfxVVIITqK2CY1PvRa X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: On Sat, 05 Jul 2025 07:17:11 +0000, ankita@nvidia.com wrote: > From: Ankit Agrawal > > Grace based platforms such as Grace Hopper/Blackwell Superchips have > CPU accessible cache coherent GPU memory. The GPU device memory is > essentially a DDR memory and retains properties such as cacheability, > unaligned accesses, atomics and handling of executable faults. This > requires the device memory to be mapped as NORMAL in stage-2. > > [...] I've gone through one additional round of bikeshedding on the series, primarily fixing some typos and refining changelogs/comments. Note that I squashed the kvm_arch_supports_cacheable_pfnmap() into the patch that adds its caller and unwired it from arch-neutral code entirely. Please do shout if there's an issue with any of this and thanks for keeping up with the several rounds of review. Applied to next, thanks! [1/6] KVM: arm64: Rename the device variable to s2_force_noncacheable https://git.kernel.org/kvmarm/kvmarm/c/8cc9dc1ae4fb [2/6] KVM: arm64: Update the check to detect device memory https://git.kernel.org/kvmarm/kvmarm/c/216887f79d98 [3/6] KVM: arm64: Block cacheable PFNMAP mapping https://git.kernel.org/kvmarm/kvmarm/c/2a8dfab26677 [5/6] KVM: arm64: Allow cacheable stage 2 mapping using VMA flags https://git.kernel.org/kvmarm/kvmarm/c/0c67288e0c8b [6/6] KVM: arm64: Expose new KVM cap for cacheable PFNMAP https://git.kernel.org/kvmarm/kvmarm/c/f55ce5a6cd33 -- Best, Oliver