From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD5FAC433EF for ; Thu, 4 Nov 2021 08:34:50 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 613EC61241 for ; Thu, 4 Nov 2021 08:34:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 613EC61241 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linuxfoundation.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvack.org Received: by kanga.kvack.org (Postfix) id E0B726B006C; Thu, 4 Nov 2021 04:34:49 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id DBB52940009; Thu, 4 Nov 2021 04:34:49 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id CA92D940008; Thu, 4 Nov 2021 04:34:49 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from forelay.hostedemail.com (smtprelay0189.hostedemail.com [216.40.44.189]) by kanga.kvack.org (Postfix) with ESMTP id BD64E6B006C for ; Thu, 4 Nov 2021 04:34:49 -0400 (EDT) Received: from smtpin30.hostedemail.com (10.5.19.251.rfc1918.com [10.5.19.251]) by forelay03.hostedemail.com (Postfix) with ESMTP id 7C7628249980 for ; Thu, 4 Nov 2021 08:34:49 +0000 (UTC) X-FDA: 78770587098.30.2DE74DE Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by imf07.hostedemail.com (Postfix) with ESMTP id 1D49610000A6 for ; Thu, 4 Nov 2021 08:34:48 +0000 (UTC) Received: by mail.kernel.org (Postfix) with ESMTPSA id A4A58611CB; Thu, 4 Nov 2021 08:34:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1636014888; bh=GEv5xuuTebeMrb1u1aiDnK4knfQaEdc4Qr1xwX/fGyo=; h=Subject:To:Cc:From:Date:In-Reply-To:From; b=wwJZHAwACtd1UwthM2Pl6mRD0qqhlu9xvAPxbN9NaDPzEkLHpjGGvRbPNg2iKlSqQ Jo/ceOEuuJu3gxX+Y+RADGhh5PMKusbzzVNNc0h4hVVK2ri0YXj1eV5ik5dq3rHp8l mYlTG6mBp+3mbgBTLj8NgEAwa/YDxcLniF2t+DZc= Subject: Patch "mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS" has been added to the 4.9-stable tree To: arnd@arndb.de,benh@kernel.crashing.org,bp@suse.de,f.fainelli@gmail.com,gregkh@linuxfoundation.org,hpa@zytor.com,kirill.shutemov@linux.intel.com,linux-arm-kernel@lists.infradead.org,linux-mips@linux-mips.org,linux-mm@kvack.org,linux-snps-arc@lists.infradead.org,linux@armlinux.org.uk,linuxppc-dev@lists.ozlabs.org,luto@amacapital.net,minchan@kernel.org,mingo@kernel.org,mingo@redhat.com,mpe@ellerman.id.au,ngupta@vflare.org,paulus@samba.org,peterz@infradead.org,ralf@linux-mips.org,rppt@linux.ibm.com,sashal@kernel.org,sergey.senozhatsky.work@gmail.com,stefan@agner.ch,tglx@linutronix.de,torvalds@linux-foundation.org,tsbogend@alpha.franken.de,vgupta@synopsys.com,x86@kernel.org Cc: From: Date: Thu, 04 Nov 2021 09:34:37 +0100 In-Reply-To: <20211103205714.374801-2-f.fainelli@gmail.com> Message-ID: <16360148778012@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 X-stable: commit X-Patchwork-Hint: ignore X-Rspamd-Server: rspam03 X-Rspamd-Queue-Id: 1D49610000A6 X-Stat-Signature: gbff5gxs437zyx7n4s7wwswfgboondof Authentication-Results: imf07.hostedemail.com; dkim=fail ("body hash did not verify") header.d=linuxfoundation.org header.s=korg header.b=wwJZHAwA; dmarc=pass (policy=none) header.from=linuxfoundation.org; spf=pass (imf07.hostedemail.com: domain of gregkh@linuxfoundation.org designates 198.145.29.99 as permitted sender) smtp.mailfrom=gregkh@linuxfoundation.org X-HE-Tag: 1636014888-61626 Content-Transfer-Encoding: quoted-printable X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: This is a note to let you know that I've just added the patch titled mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS to the 4.9-stable tree which can be found at: http://www.kernel.org/git/?p=3Dlinux/kernel/git/stable/stable-queue.g= it;a=3Dsummary The filename of the patch is: mm-zsmalloc-prepare-to-variable-max_physmem_bits.patch and it can be found in the queue-4.9 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >From foo@baz Thu Nov 4 09:33:49 AM CET 2021 From: Florian Fainelli Date: Wed, 3 Nov 2021 13:57:13 -0700 Subject: mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS To: linux-kernel@vger.kernel.org Cc: stable@vger.kernel.org, Greg Kroah-Hartman , Sasha Levin , "Kirill A. Shutemov" , Nitin Gupta , Minchan Kim , Andy Lutomirski , Borislav Petkov , Linus Torvalds , Peter Zijlstra = , Sergey Senozhatsky , Thomas Gleixner , linux-mm@kvack.org, Ingo Mol= nar , Florian Fainelli , Vineet G= upta , Russell King , Ralf Ba= echle , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Ingo Molnar , "H. Peter Anvin" ,= x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), Arnd B= ergmann , Thomas Bogendoerfer , Mike Rapoport , Stefan Agne= r , linux-snps-arc@lists.infradead.org (open list:SYNOPS= YS ARC ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated lis= t:ARM PORT), linux-mips@linux-mips.org (open list:MIPS), linuxppc-dev@lis= ts.ozlabs.org (open list:LINUX FOR POWERPC (32-BIT AND 64-BIT)), linux-ar= ch@vger.kernel.org (open list:GENERIC INCLUDE/ASM HEADER FILES) Message-ID: <20211103205714.374801-2-f.fainelli@gmail.com> From: "Kirill A. Shutemov" commit 02390b87a9459937cdb299e6b34ff33992512ec7 upstream With boot-time switching between paging mode we will have variable MAX_PHYSMEM_BITS. Let's use the maximum variable possible for CONFIG_X86_5LEVEL=3Dy configuration to define zsmalloc data structures. The patch introduces MAX_POSSIBLE_PHYSMEM_BITS to cover such case. It also suits well to handle PAE special case. Signed-off-by: Kirill A. Shutemov Reviewed-by: Nitin Gupta Acked-by: Minchan Kim Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Sergey Senozhatsky Cc: Thomas Gleixner Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/20180214111656.88514-3-kirill.shutemov@lin= ux.intel.com Signed-off-by: Ingo Molnar [florian: drop arch/x86/include/asm/pgtable_64_types.h changes since there is no CONFIG_X86_5LEVEL] Signed-off-by: Florian Fainelli Signed-off-by: Greg Kroah-Hartman --- arch/x86/include/asm/pgtable-3level_types.h | 1 + mm/zsmalloc.c | 13 +++++++------ 2 files changed, 8 insertions(+), 6 deletions(-) --- a/arch/x86/include/asm/pgtable-3level_types.h +++ b/arch/x86/include/asm/pgtable-3level_types.h @@ -42,5 +42,6 @@ typedef union { */ #define PTRS_PER_PTE 512 =20 +#define MAX_POSSIBLE_PHYSMEM_BITS 36 =20 #endif /* _ASM_X86_PGTABLE_3LEVEL_DEFS_H */ --- a/mm/zsmalloc.c +++ b/mm/zsmalloc.c @@ -83,18 +83,19 @@ * This is made more complicated by various memory models and PAE. */ =20 -#ifndef MAX_PHYSMEM_BITS -#ifdef CONFIG_HIGHMEM64G -#define MAX_PHYSMEM_BITS 36 -#else /* !CONFIG_HIGHMEM64G */ +#ifndef MAX_POSSIBLE_PHYSMEM_BITS +#ifdef MAX_PHYSMEM_BITS +#define MAX_POSSIBLE_PHYSMEM_BITS MAX_PHYSMEM_BITS +#else /* * If this definition of MAX_PHYSMEM_BITS is used, OBJ_INDEX_BITS will j= ust * be PAGE_SHIFT */ -#define MAX_PHYSMEM_BITS BITS_PER_LONG +#define MAX_POSSIBLE_PHYSMEM_BITS BITS_PER_LONG #endif #endif -#define _PFN_BITS (MAX_PHYSMEM_BITS - PAGE_SHIFT) + +#define _PFN_BITS (MAX_POSSIBLE_PHYSMEM_BITS - PAGE_SHIFT) =20 /* * Memory for allocating for handle keeps object position by Patches currently in stable-queue which might be from f.fainelli@gmail.co= m are queue-4.9/mm-zsmalloc-prepare-to-variable-max_physmem_bits.patch queue-4.9/arch-pgtable-define-max_possible_physmem_bits-where-needed.patc= h