From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f70.google.com (mail-wm0-f70.google.com [74.125.82.70]) by kanga.kvack.org (Postfix) with ESMTP id 7073C6B002C for ; Fri, 16 Mar 2018 15:30:07 -0400 (EDT) Received: by mail-wm0-f70.google.com with SMTP id n14so1353313wmc.0 for ; Fri, 16 Mar 2018 12:30:07 -0700 (PDT) Received: from theia.8bytes.org (8bytes.org. [2a01:238:4383:600:38bc:a715:4b6d:a889]) by mx.google.com with ESMTPS id o63si522129edb.116.2018.03.16.12.30.05 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Mar 2018 12:30:06 -0700 (PDT) From: Joerg Roedel Subject: [PATCH 15/35] x86/pgtable: Rename pti_set_user_pgd to pti_set_user_pgtbl Date: Fri, 16 Mar 2018 20:29:33 +0100 Message-Id: <1521228593-3820-16-git-send-email-joro@8bytes.org> In-Reply-To: <1521228593-3820-1-git-send-email-joro@8bytes.org> References: <1521228593-3820-1-git-send-email-joro@8bytes.org> Sender: owner-linux-mm@kvack.org List-ID: To: Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" Cc: x86@kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Linus Torvalds , Andy Lutomirski , Dave Hansen , Josh Poimboeuf , Juergen Gross , Peter Zijlstra , Borislav Petkov , Jiri Kosina , Boris Ostrovsky , Brian Gerst , David Laight , Denys Vlasenko , Eduardo Valentin , Greg KH , Will Deacon , aliguori@amazon.com, daniel.gruss@iaik.tugraz.at, hughd@google.com, keescook@google.com, Andrea Arcangeli , Waiman Long , Pavel Machek , jroedel@suse.de, joro@8bytes.org From: Joerg Roedel With the way page-table folding is implemented on 32 bit, we are not only setting PGDs with this functions, but also PUDs and even PMDs. Give the function a more generic name to reflect that. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/pgtable_64.h | 12 ++++++------ arch/x86/mm/pti.c | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h index 81462e9..b68bda5 100644 --- a/arch/x86/include/asm/pgtable_64.h +++ b/arch/x86/include/asm/pgtable_64.h @@ -195,21 +195,21 @@ static inline bool pgdp_maps_userspace(void *__ptr) } #ifdef CONFIG_PAGE_TABLE_ISOLATION -pgd_t __pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd); +pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd); /* * Take a PGD location (pgdp) and a pgd value that needs to be set there. * Populates the user and returns the resulting PGD that must be set in * the kernel copy of the page tables. */ -static inline pgd_t pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd) +static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) { if (!static_cpu_has(X86_FEATURE_PTI)) return pgd; - return __pti_set_user_pgd(pgdp, pgd); + return __pti_set_user_pgtbl(pgdp, pgd); } #else -static inline pgd_t pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd) +static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) { return pgd; } @@ -218,7 +218,7 @@ static inline pgd_t pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd) static inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d) { #if defined(CONFIG_PAGE_TABLE_ISOLATION) && !defined(CONFIG_X86_5LEVEL) - p4dp->pgd = pti_set_user_pgd(&p4dp->pgd, p4d.pgd); + p4dp->pgd = pti_set_user_pgtbl(&p4dp->pgd, p4d.pgd); #else *p4dp = p4d; #endif @@ -236,7 +236,7 @@ static inline void native_p4d_clear(p4d_t *p4d) static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd) { #ifdef CONFIG_PAGE_TABLE_ISOLATION - *pgdp = pti_set_user_pgd(pgdp, pgd); + *pgdp = pti_set_user_pgtbl(pgdp, pgd); #else *pgdp = pgd; #endif diff --git a/arch/x86/mm/pti.c b/arch/x86/mm/pti.c index ce38f16..8f53d21 100644 --- a/arch/x86/mm/pti.c +++ b/arch/x86/mm/pti.c @@ -102,7 +102,7 @@ void __init pti_check_boottime_disable(void) setup_force_cpu_cap(X86_FEATURE_PTI); } -pgd_t __pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd) +pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) { /* * Changes to the high (kernel) portion of the kernelmode page -- 2.7.4