Re: [PATCH 1/5] x86, mm, pat: Set WT to PA4 slot of PAT MSR

[Toshi Kani <toshi.kani@hp.com>]

On Fri, 2014-09-05 at 08:41 -0700, H. Peter Anvin wrote:
> On 09/05/2014 08:22 AM, Toshi Kani wrote:
> > On Fri, 2014-09-05 at 08:07 -0700, H. Peter Anvin wrote:
> >> On 09/05/2014 07:00 AM, Toshi Kani wrote:
> >>>
> >>> That's a fine idea, but as Ingo also suggested, I am going to disable
> >>> this feature on all Pentium 4 models.  That should give us a safety
> >>> margin.  Using slot 4 has a benefit that it keeps the PAT setup
> >>> consistent with Xen.      
> >>>
> >>
> >> Slot 4 is also the maximally problematic one, because it is the one that
> >> might be incorrectly invoked for the page tables themselves.
> > 
> > Good point.  I wonder if Xen folks feel strongly about keeping the PAT
> > setup consistent with the kernel.  If not, we may choose to use slot 6
> > (or 7).
> > 
> 
> Who cares what the Xen folks "feel strongly about"?  If strong feelings
> were a design criterion Xen support would have been pulled from the
> kernel a long, long time ago.
> 
> The important thing is how to design for the situation that we currently
> have to live with.

I see.  Then, I am going to use slot 7 for WT as suggested by Andy.  I
think it is the safest slot as slot 3 is UC and is not currently used.

Thanks,
-Toshi

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