From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: "David S. Miller" <davem@davemloft.net>
Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: update_mmu_cache(): fault or not fault ?
Date: Tue, 27 Sep 2005 07:28:10 +1000 [thread overview]
Message-ID: <1127770090.15882.86.camel@gaston> (raw)
In-Reply-To: <20050926.125203.132216841.davem@davemloft.net>
On Mon, 2005-09-26 at 12:52 -0700, David S. Miller wrote:
> So this is a ton of complication, which is straightforwardly done in
> the TLB miss handler. And if you think about it, since we've been
> writing the PTE entries and walking the page tables for fault
> processing, all of this will be hot in the L2 cache when we take
> the nearly immediate TLB miss.
>
> Anyways, I'm very likely going to remove the prefilling of TLB entries
> on sparc64. I hope it's more beneficial and less complicated for ppc64
> :-)
Ok, makes sense. On most ppc, things aren't pretty much equivalent on
real faults and pre-fill (except for masking interrupts which we have to
add to the pre-fill case). Anyway, best is to get real numbers with some
benchmarks, I'll see if I can get something from the 4xx folks.
Ben.
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next prev parent reply other threads:[~2005-09-26 21:28 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-09-26 6:22 Benjamin Herrenschmidt
2005-09-26 7:41 ` David S. Miller, Benjamin Herrenschmidt
2005-09-26 8:03 ` Benjamin Herrenschmidt
2005-09-26 19:52 ` David S. Miller, Benjamin Herrenschmidt
2005-09-26 21:28 ` Benjamin Herrenschmidt [this message]
2005-09-26 8:05 ` Benjamin Herrenschmidt
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