From: Nadav Amit <nadav.amit@broadcom.com>
To: Jisheng Zhang <jszhang@kernel.org>
Cc: Will Deacon <will@kernel.org>,
Aneesh Kumar K V <aneesh.kumar@linux.ibm.com>,
Andrew Morton <akpm@linux-foundation.org>,
Nick Piggin <npiggin@gmail.com>,
Peter Zijlstra <peterz@infradead.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>, Arnd Bergmann <arnd@arndb.de>,
linux-arch@vger.kernel.org, linux-mm <linux-mm@kvack.org>,
linux-arm-kernel@lists.infradead.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-riscv@lists.infradead.org, Nadav Amit <namit@vmware.com>,
Andrea Arcangeli <aarcange@redhat.com>,
Andy Lutomirski <luto@kernel.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>, Yu Zhao <yuzhao@google.com>,
the arch/x86 maintainers <x86@kernel.org>
Subject: Re: [PATCH 1/2] mm/tlb: fix fullmm semantics
Date: Thu, 4 Jan 2024 15:26:43 +0200 [thread overview]
Message-ID: <0468E994-273E-4A8B-A521-150723DA9774@broadcom.com> (raw)
In-Reply-To: <ZZN35DTJTNExCNXW@xhacker>
> On Jan 2, 2024, at 4:41 AM, Jisheng Zhang <jszhang@kernel.org> wrote:
>
> On Sat, Dec 30, 2023 at 11:54:02AM +0200, Nadav Amit wrote:
>
>>
>> My knowledge of arm64 is a bit limited, but the code does not seem
>> to match the comment, so if it is correct (which I strongly doubt),
>> the comment should be updated.
>
> will do if the above change is accepted by arm64
Jisheng, I expected somebody with arm64 knowledge to point it out, and
maybe I am wrong, but I really don’t understand something about the
correctness, if you can please explain.
In the following code:
--- a/arch/arm64/include/asm/tlb.h
+++ b/arch/arm64/include/asm/tlb.h
@@ -62,7 +62,10 @@ static inline void tlb_flush(struct mmu_gather *tlb)
* invalidating the walk-cache, since the ASID allocator won't
* reallocate our ASID without invalidating the entire TLB.
*/
- if (tlb->fullmm) {
+ if (tlb->fullmm)
+ return;
You skip flush if fullmm is on. But if page-tables are freed, you may
want to flush immediately and not wait for ASID to be freed to avoid
speculative page walks; these walks at least on x86 caused a mess.
No?
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next prev parent reply other threads:[~2024-01-04 13:27 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-28 8:46 [PATCH 0/2] riscv: tlb: avoid tlb flushing on exit & execve Jisheng Zhang
2023-12-28 8:46 ` [PATCH 1/2] mm/tlb: fix fullmm semantics Jisheng Zhang
2023-12-30 9:54 ` Nadav Amit
2024-01-02 2:41 ` Jisheng Zhang
2024-01-04 13:26 ` Nadav Amit [this message]
2024-01-03 17:50 ` Will Deacon
2024-01-03 17:57 ` Will Deacon
2024-01-03 18:05 ` Catalin Marinas
2024-01-03 20:26 ` Dave Hansen
2023-12-28 8:46 ` [PATCH 2/2] riscv: tlb: avoid tlb flushing if fullmm == 1 Jisheng Zhang
2023-12-30 18:26 ` Alexandre Ghiti
2024-01-02 3:12 ` Jisheng Zhang
2024-01-04 13:00 ` Alexandre Ghiti
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