From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id E68DBC433FE for ; Fri, 4 Nov 2022 22:09:02 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 2CA588E0001; Fri, 4 Nov 2022 18:09:02 -0400 (EDT) Received: by kanga.kvack.org (Postfix, from userid 40) id 27ADB6B0073; Fri, 4 Nov 2022 18:09:02 -0400 (EDT) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 11B468E0001; Fri, 4 Nov 2022 18:09:02 -0400 (EDT) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0011.hostedemail.com [216.40.44.11]) by kanga.kvack.org (Postfix) with ESMTP id 029F56B0071 for ; Fri, 4 Nov 2022 18:09:01 -0400 (EDT) Received: from smtpin15.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id BF5D61615D9 for ; Fri, 4 Nov 2022 22:09:01 +0000 (UTC) X-FDA: 80097150882.15.13ECD86 Received: from mail-pj1-f50.google.com (mail-pj1-f50.google.com [209.85.216.50]) by imf02.hostedemail.com (Postfix) with ESMTP id 3921A8000A for ; Fri, 4 Nov 2022 22:09:01 +0000 (UTC) Received: by mail-pj1-f50.google.com with SMTP id b11so5685990pjp.2 for ; Fri, 04 Nov 2022 15:09:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=napPnSIw0O4XTTZP4wyQ6oPOXAEKNUr4s9A73CKQSGY=; b=kD7U+cpuu24FxYIN5EAreZ+Lgq4/6Lmu0A/TMirFktAtEnJ6s/fxEjpZwCHASc/pe1 TDiNdvj+dOcC8LhggBtnkE46ljAq3pW23UkgihaSE8gBgkPhhCzFSB9VY2ZgAkHJhSEb q4VCV/91gDwk1BtNNky6RFeYPBdHCUQQWAQadkKY438p0y4ZUxOJ8Zs4CnxDGpzuP7Ai tFhD75PCzHmjqL6Kz7HTIuSZchB+VO8M/lRg2cDW+s5llYuLD0W2UZx57IiOMRRjqxDO s+WhrkXWQzJM73VUKB+0azHenEKMKkoOzzmqLAsZ8WWi+1ieIxWFLGFNAGwTf0W/VuUU fCpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=napPnSIw0O4XTTZP4wyQ6oPOXAEKNUr4s9A73CKQSGY=; b=pwBmeVFRqv5CH5TWVcC+WHWHw5p+7QQR4/7MGOcEghAWgbjCRvPVVGByefiAhFKyl1 /8ud5F+7OgAh0twK1IIbZ9GRqpDgJAZ6f2oizG79J66aNBtzyjuffhp234HgsEFyDdpJ NnUwwZvl/SQvDWvv1ZJMWZLxHWBDbp06wrU2GUGpcmPIeKUEy3sac5o09E8F9M8IwqbS 5TWxFFM3DPLE9NxqVkOtBqRFct+WS09XhLG/owatRtxsoVlIraZ4LtLNWLEwzx/e0Gah 0DeqIn7O/IBixZbtMELBWsmEc7s5WlyL0ShoLv0/8LWcNzOUO/g/wHtohxFud0m4VwUG ATYg== X-Gm-Message-State: ACrzQf2/Dyd8S7Jibsdy/AzEfglILJtY62eZ2c5uTJy4uhtvFHgH4aTZ QjUeyxtt0YOTG8ay4dVJfAecCQ== X-Google-Smtp-Source: AMsMyM6oA5ahyPe5S23IV6l2y4Cn84YgPaoYV2u7BrPePhrp2+b/+qkXCRldxNDh4Izp85AArod68g== X-Received: by 2002:a17:902:d4c4:b0:186:acb0:e93c with SMTP id o4-20020a170902d4c400b00186acb0e93cmr380593plg.141.1667599739868; Fri, 04 Nov 2022 15:08:59 -0700 (PDT) Received: from [192.168.50.116] (c-24-4-73-83.hsd1.ca.comcast.net. [24.4.73.83]) by smtp.gmail.com with ESMTPSA id m21-20020a170902bb9500b00186e2123506sm200448pls.300.2022.11.04.15.08.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Nov 2022 15:08:59 -0700 (PDT) Message-ID: <013150d0-c2cd-847a-6e6d-3292035b208d@rivosinc.com> Date: Fri, 4 Nov 2022 15:08:56 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH v12 08/17] riscv: Add task switch support for vector Content-Language: en-US To: Chris Stillson Cc: Greentime Hu , Andrew Waterman , Nick Knight , Guo Ren , Vincent Chen , Ruinland Tsai , kernel test robot , Paul Walmsley , Palmer Dabbelt , Albert Ou , Eric Biederman , Kees Cook , Anup Patel , Atish Patra , Oleg Nesterov , Guo Ren , Heinrich Schuchardt , Conor Dooley , linux-riscv , lkml , linux-mm@kvack.org, Andy Chiu References: <20220921214439.1491510-1-stillson@rivosinc.com> <20220921214439.1491510-8-stillson@rivosinc.com> From: Vineet Gupta In-Reply-To: <20220921214439.1491510-8-stillson@rivosinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1667599741; a=rsa-sha256; cv=none; b=8P30H0CdXgeL0H1mCKMEem97YEeNhHKwi62Z7bYVx4kYlTkzFVYy2D18/iO1XsTurkjBs9 nLhkzo4dz5Y4TDv6qdXgahfPfup1Fveadr4cFUXVFfzPvXuaIYp5qzEnwXvL5igsXWO2sl dvIFVGqbehqlLE9K4K4ktKzqUlwMMGY= ARC-Authentication-Results: i=1; imf02.hostedemail.com; dkim=pass header.d=rivosinc-com.20210112.gappssmtp.com header.s=20210112 header.b=kD7U+cpu; spf=pass (imf02.hostedemail.com: domain of vineetg@rivosinc.com designates 209.85.216.50 as permitted sender) smtp.mailfrom=vineetg@rivosinc.com; dmarc=none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1667599741; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:dkim-signature; bh=napPnSIw0O4XTTZP4wyQ6oPOXAEKNUr4s9A73CKQSGY=; b=yzROQV8QhW1TW2lT5cdpbVhFQdOcZ9aTx1ja1Ve8gPedfnWgO9t6qDLnRmLD6oWIq2y7VG rNTuzdTWZNNhJ4a5OzGDkTa4QK5YhynR7P47m12oX/keybJDXZxzO4GZSwMx+gwkzanXG6 Er219FkgE/Nxr3ojRddTTxR85uwUjbQ= X-Stat-Signature: 8o8sdd3cy3icx1wowhnkcejb6tppdkzw X-Rspamd-Server: rspam09 X-Rspam-User: X-Rspamd-Queue-Id: 3921A8000A Authentication-Results: imf02.hostedemail.com; dkim=pass header.d=rivosinc-com.20210112.gappssmtp.com header.s=20210112 header.b=kD7U+cpu; spf=pass (imf02.hostedemail.com: domain of vineetg@rivosinc.com designates 209.85.216.50 as permitted sender) smtp.mailfrom=vineetg@rivosinc.com; dmarc=none X-HE-Tag: 1667599741-72697 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: On 9/21/22 14:43, Chris Stillson wrote: > From: Greentime Hu > > This patch adds task switch support for vector. It supports partial lazy > save and restore mechanism. It also supports all lengths of vlen. > > [guoren@linux.alibaba.com: First available porting to support vector > context switching] > [nick.knight@sifive.com: Rewrite vector.S to support dynamic vlen, xlen and > code refine] > [vincent.chen@sifive.com: Fix the might_sleep issue in vstate_save, > vstate_restore] > [andrew@sifive.com: Optimize task switch codes of vector] > [ruinland.tsai@sifive.com: Fix the arch_release_task_struct free wrong > datap issue] > > Suggested-by: Andrew Waterman > Co-developed-by: Nick Knight > Signed-off-by: Nick Knight > Co-developed-by: Guo Ren > Signed-off-by: Guo Ren > Co-developed-by: Vincent Chen > Signed-off-by: Vincent Chen > Co-developed-by: Ruinland Tsai > Signed-off-by: Ruinland Tsai > Signed-off-by: Greentime Hu > Reported-by: kernel test robot > Reported-by: kernel test robot > --- > arch/riscv/include/asm/switch_to.h | 66 ++++++++++++++++++++++++++++++ > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/process.c | 43 +++++++++++++++++++ > 3 files changed, 110 insertions(+) > > diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h > index df1aa589b7fd..527951c033d4 100644 > --- a/arch/riscv/include/asm/switch_to.h > +++ b/arch/riscv/include/asm/switch_to.h > @@ -7,11 +7,13 @@ > #define _ASM_RISCV_SWITCH_TO_H > > #include > +#include > #include > #include > #include > #include > #include > +#include > > #ifdef CONFIG_FPU > extern void __fstate_save(struct task_struct *save_to); > @@ -68,6 +70,68 @@ static __always_inline bool has_fpu(void) { return false; } > #define __switch_to_fpu(__prev, __next) do { } while (0) > #endif > > +#ifdef CONFIG_VECTOR > +extern struct static_key_false cpu_hwcap_vector; > +static __always_inline bool has_vector(void) > +{ > + return static_branch_likely(&cpu_hwcap_vector); > +} > +extern unsigned long riscv_vsize; > +extern void __vstate_save(struct __riscv_v_state *save_to, void *datap); > +extern void __vstate_restore(struct __riscv_v_state *restore_from, void *datap); > + > +static inline void __vstate_clean(struct pt_regs *regs) > +{ > + regs->status = (regs->status & ~(SR_VS)) | SR_VS_CLEAN; > +} > + > +static inline void vstate_off(struct task_struct *task, > + struct pt_regs *regs) > +{ > + regs->status = (regs->status & ~SR_VS) | SR_VS_OFF; > +} > + > +static inline void vstate_save(struct task_struct *task, > + struct pt_regs *regs) > +{ > + if ((regs->status & SR_VS) == SR_VS_DIRTY) { > + struct __riscv_v_state *vstate = &(task->thread.vstate); > + > + __vstate_save(vstate, vstate->datap); > + __vstate_clean(regs); > + } > +} > + > +static inline void vstate_restore(struct task_struct *task, > + struct pt_regs *regs) > +{ > + if ((regs->status & SR_VS) != SR_VS_OFF) { > + struct __riscv_v_state *vstate = &(task->thread.vstate); > + > + __vstate_restore(vstate, vstate->datap); > + __vstate_clean(regs); > + } > +} > + > +static inline void __switch_to_vector(struct task_struct *prev, > + struct task_struct *next) > +{ > + struct pt_regs *regs; > + > + regs = task_pt_regs(prev); > + if (unlikely(regs->status & SR_SD)) > + vstate_save(prev, regs); > + vstate_restore(next, task_pt_regs(next)); > +} > + > +#else > +static __always_inline bool has_vector(void) { return false; } > +#define riscv_vsize (0) > +#define vstate_save(task, regs) do { } while (0) > +#define vstate_restore(task, regs) do { } while (0) > +#define __switch_to_vector(__prev, __next) do { } while (0) > +#endif All of this needs to be moved into vector.h for better containment. I would also wire in struct __riscv_v_state vstate in struct thread_struct in this patch. > diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile > index 33bb60a354cd..35752fb6d145 100644 > --- a/arch/riscv/kernel/Makefile > +++ b/arch/riscv/kernel/Makefile > @@ -55,6 +55,7 @@ obj-$(CONFIG_MMU) += vdso.o vdso/ > > obj-$(CONFIG_RISCV_M_MODE) += traps_misaligned.o > obj-$(CONFIG_FPU) += fpu.o > +obj-$(CONFIG_VECTOR) += vector.o This needs to go into last patch which adds Kconfig/Makefile enabling. > + > + if (has_vector()) { Would it make sense to add IS_ENABLED(CONFIG_VECTOR) inside this helper - would help compiler remove the codegen completely for !VECTOR but still having some build test coverage. Anyhow this is minor point and can be added later. > + struct __riscv_v_state *vstate = &(current->thread.vstate); > + > + /* Enable vector and allocate memory for vector registers. */ > + if (!vstate->datap) { > + vstate->datap = kzalloc(riscv_vsize, GFP_KERNEL); > + if (WARN_ON(!vstate->datap)) > + return; > + } > + regs->status |= SR_VS_INITIAL; > + > + /* > + * Restore the initial value to the vector register > + * before starting the user program. > + */ > + vstate_restore(current, regs); > + } > + ... > +#ifdef CONFIG_VECTOR > + /* Reset vector state */ > + vstate_off(current, task_pt_regs(current)); > + memset(¤t->thread.vstate, 0, RISCV_V_STATE_DATAP); > +#endif This doesn't check has_vector() as we want to unconditionally clean memory for security reasons ? > } > > int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) > { > fstate_save(src, task_pt_regs(src)); > *dst = *src; > + dst->thread.vstate.datap = NULL; has_vector() needed here ? > > +void arch_release_task_struct(struct task_struct *tsk) > +{ > + /* Free the vector context of datap. */ > + if (has_vector() && tsk->thread.vstate.datap) > + kfree(tsk->thread.vstate.datap); > +} > + > int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) > { > unsigned long clone_flags = args->flags; > @@ -175,7 +208,17 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) > p->thread.ra = (unsigned long)ret_from_kernel_thread; > p->thread.s[0] = (unsigned long)args->fn; > p->thread.s[1] = (unsigned long)args->fn_arg; > + p->thread.vstate.datap = NULL; > } else { > + /* Allocate the datap for the user process if datap is NULL */ > + if (has_vector() && !p->thread.vstate.datap) { > + void *datap = kzalloc(riscv_vsize, GFP_KERNEL); > + /* Failed to allocate memory. */ > + if (!datap) > + return -ENOMEM; > + p->thread.vstate.datap = datap; > + memset(&p->thread.vstate, 0, RISCV_V_STATE_DATAP); > + } > *childregs = *(current_pt_regs()); > if (usp) /* User fork */ > childregs->sp = usp;