From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D032E3081AC; Fri, 19 Sep 2025 14:23:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758291803; cv=none; b=dHOAZKVHRO7PigHVlw9V+14R9eB/2rGu1jG2OzP11YG++BE5bGiFZayM9w+yytm6SF+3/bSkZschdsZ5dtkuInwg3B1plqWC19dbOxEFsrVQHP1ZNCFyJ7pgt5xFpgNIJclM3q8FQSpqEdWcAmm9xXNa41ZZlClt0aKa0KUZ3+M= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1758291803; c=relaxed/simple; bh=qurIkcqttoZIUncvhRG2Ez96lBIE03pACZ8DNjCjo6Y=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=hp+OhpUu8LpeLgKSdshSraSKajXo93vnnIKRxJEnfH6+gHGuIVSgEKWxmfuUxIjsRWt47e/2cwzwr5M7pPrKdBkjQ5ulSPaDgsILXy8Oc+iq3wksC5jl+eCx0XPvyYKDyvdkmKleqqyNVNB92Omwm7ruTV+MbPhDQu1GK7bkvJY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=DqmZmjL1; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="DqmZmjL1" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1758291801; x=1789827801; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=qurIkcqttoZIUncvhRG2Ez96lBIE03pACZ8DNjCjo6Y=; b=DqmZmjL1Vr01OtNXPufat1VE6VbfuXmbDYQpOXDPeFU4FzwuiYqbmhc2 aB0qEH4vgv4ghrCQrhCDyQjHA1ivE5KkHpIeOBrFjd1DUoo0wr5W/VfDR wZ8uFZZCxDGCTgFVc+Ks8BNpjUtmhtxRvXrNfhQ9QASbNlZsiljTGXPsH gVLzq5kU3C4uZOzZXcs39D+Xs4ce6Gz8I/8bhTdMkDZdUNMAlEVTaSgRb UnukVxGtk3Zx5I4Gha+2nS+v8hhoRhhkODDG5QzyVkRYG4NKVlMmb0mv4 aKsY1wyr1yH7i2tciBdgWIrxf14E3j/BnBH22saDnAvMKqOn1D+DAaaDS A==; X-CSE-ConnectionGUID: JybeGcZkTJ+KqZUxcYOinw== X-CSE-MsgGUID: 4qBXFe4MTX2xEanG6m6MKA== X-IronPort-AV: E=Sophos;i="6.18,278,1751266800"; d="scan'208";a="52616540" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 19 Sep 2025 07:23:20 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Fri, 19 Sep 2025 07:22:15 -0700 Received: from [10.159.245.205] (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 19 Sep 2025 07:22:10 -0700 Message-ID: <775e175a-6699-4b7b-a997-3d142fdf64e4@microchip.com> Date: Fri, 19 Sep 2025 16:22:10 +0200 Precedence: bulk X-Mailing-List: ksummit@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [TECH TOPIC] Reaching consensus on CONFIG_HIGHMEM phaseout To: Arnd Bergmann , Jason Gunthorpe CC: , , , , , , , Christophe Leroy , Richard Weinberger , Lucas Stach , Linus Walleij , Geert Uytterhoeven , Ankur Arora , David Hildenbrand , Mike Rapoport , Lorenzo Stoakes , Matthew Wilcox , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Suren Baghdasaryan , Ira Weiny , Nishanth Menon , =?UTF-8?Q?Heiko_St=C3=BCbner?= , Alexander Sverdlin , "Chester A. Unal" , Sergio Paracuellos , Andreas Larsson References: <4ff89b72-03ff-4447-9d21-dd6a5fe1550f@app.fastmail.com> <20250917125951.GA1390993@nvidia.com> <02b0f383-1c43-4eeb-a76f-830c2970b833@app.fastmail.com> From: Nicolas Ferre Content-Language: en-US, fr Organization: microchip In-Reply-To: <02b0f383-1c43-4eeb-a76f-830c2970b833@app.fastmail.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit On 18/09/2025 at 15:12, Arnd Bergmann wrote: > * Microchip SAM9x7 is the newest ARMv5 chip, clearly does > get kernel updates, and the only one I can think of with > DDR3 support, but seems to be limited to 256MB total memory. It is indeed. No difficulty on this part of the product line ;-) Best regards, Nicolas