Re: [TECH TOPIC] UALink driver upstreaming

[<dan.j.williams@intel.com>]

Sinyuk, Konstantin wrote:
> Hi All,
> 
> The UALink Consortium is defining an open, vendor‑neutral interconnect aimed
> at scaling AI workloads with low‑latency, memory‑semantic communication
> beyond PCIe. Unlike proprietary solutions such as NVLink (NVIDIA) or
> Infinity Fabric (AMD), UALink is a cross‑vendor standard and was recently
> recognized at FMS 2025.
> 
> I would like to present a proposal on what UALink support could look like in
> the upstream Linux kernel.
> 
> Key areas for discussion:
> - Core driver design: proposed start under drivers/misc/ual/ for discovery,
>   topology, and resource management.
> - Memory semantics: same‑OS and multi‑OS rack scenarios, leveraging dma_buf,
>   HMM, and NUMA.
> - Control path: AUX bus for vendor extensions, offloading real‑time sequences
>   to device microcontrollers, generic UALink interface.
> - Security: confidential compute support and a userspace daemon for topology
>   and authentication.
> - Upstreaming strategy: begin with a minimal core driver, then incrementally
>   extend toward MM integration, dma_buf support, security, and
>   cross‑subsystem work.
> 
> The goal is to decide how UALink should be represented as a first‑class
> interconnect in Linux, complementing CXL while remaining vendor‑neutral,
> ABI‑stable, and maintainable.

Hi Konstantin,

Please do also consider submitting this as a topic for the Device Memory
Microconference (https://lpc.events/event/19/contributions/2009/).

Many of folks with experience with CXL, NVLink, Infinity Fabric, RDMA,
HMM, NUMA, dma_buf, Confidential Computing etc... will also be in the
room for a focused topic like this.