Re: [Ksummit-discuss] [TECH TOPIC] Memory model, using ISO C++11 atomic ops

[David Howells <dhowells@redhat.com>]

David Woodhouse <dwmw2@infradead.org> wrote:

> In Seoul last year, weren't we looking at things like readl_relaxed()
> and lamenting the fact that they do actually still have strong enough
> requirements that they can't *really* be very relaxed on Power and
> ARM64 at all, because they're basically being used with the assumption
> of Intel-like semantics.

I don't recall that.  Possibly that was a track I wasn't in.

> The cheap answer is "well, it sucks to be on POWER or ARM64 because
> then readl_relaxed() has to be as slow as readl() is".

Does the memory model for CPU/device interactions have to be the same as that
for CPU/CPU interactions?  I guess with respect to locks, it does so that two
processors who both want to access a device don't trample over each other.

> Is that what Paul is working on, that you mention above?

Paul is working on a general overall description.

David